MatX designs next-generation AI processors aimed at outperforming Nvidia GPUs for large language model training and inference.
<p><strong>What MatX Is Building</strong></p> <p>MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. MatX is seeking System Software Engineer to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies.</p> <p>The MatX host system software team owns everything that makes our AI silicon and systems usable: from Linux kernel drivers up through node and cluster management. The team also co-owns the BMC/OpenBMC firmware stack, with dedicated firmware engineers, so host software and out-of-band management are designed together rather than bolted together. We're looking for self-driven engineers who can take a hardware spec and a register map and just start building — prototype drivers, low-level utilities that talk directly to the chip, daemons, and tooling — with minimal hand-holding. Each engineer on this team has a primary focus area, but ownership of overlapping components is shared, and you should expect (and want) to venture across the stack.</p> <p><strong>What You'll Do Here</strong></p> <ul> <li>Architect, design, and implement the Linux kernel driver stack for MatX's AI accelerators (PCIe endpoint devices), including memory management, DMA, interrupt handling, and command submission paths</li> <li>Build the low-level userspace libraries that sit directly on top of the driver — ioctl/sysfs interfaces, memory mapping, direct chip access utilities</li> <li>Test and validate early chip features on pre-silicon platforms: software simulation, emulation, and FPGA environments — often as the first software to ever touch a new hardware feature</li> <li>Write quick prototype code, debug utilities, and bring-up tooling to exercise the chip directly, well before polished production software exists</li> <li>Drive first-silicon bring-up side by side with hardware, BMC firmware, and platform engineers, debugging issues that span RTL, firmware, kernel, and userspace</li> <li>Profile and optimize the host I/O path: PCIe throughput, DMA efficiency, interrupt latency, and OS overheads</li> <li>Deliver unit and regression tests for kernel and library components</li> <li>Expose driver-level device state and error information in ways the platform telemetry and management layers (and, where relevant, the BMC) can consume</li> <li>Influence next-generation chip architecture by feeding software requirements back into silicon design</li> <li>Share ownership of adjacent components with teammates — e.g., contributing to the chip initialization and telemetry daemons that build on your driver interfaces</li> </ul> <p><strong>Who You Are</strong></p> <ul> <li>BS or higher in Computer Science, Electrical Engineering, or equivalent practical experience, with 8+ years in low-level systems software</li> <li>Strong hands-on Linux kernel development experience — you've written and shipped device drivers, ideally for PCIe devices</li> <li>Strong C programming skills; comfortable in userspace and kernel space</li> <li>Able to read hardware datasheets and register definitions and program a device from them, without waiting for someone to explain the hardware</li> <li>Deep understanding of computer architecture and OS internals: MMIO, DMA, interrupts, IOMMU, memory hierarchy, processes/threads, virtual memory</li> <li>Experienced debugging complex hardware/software interaction issues with limited visibility</li> <li>Self-driven and comfortable with ambiguity — able to own a component from blank page through bring-up and validation on a small, fast-moving team</li> </ul> <p><strong>Bonus Points If You Have</strong></p> <ul> <li>Experience with pre-silicon validation environments (simulation, emulation, FPGA prototyping)</li> <li>First-silicon or new-platform bring-up experience for accelerators, NICs, or SoCs</li> <li>Familiarity with SR-IOV, dma-buf, peer-to-peer PCIe, or VFIO</li> <li>Kernel performance tuning and profiling experience (perf, ftrace, eBPF)</li> <li>Exposure to BMC/host interaction paths (e.g., in-band vs. out-of-band device access, sideband interfaces such as I2C/SMBus)</li> <li>Rust for systems programming</li> </ul> <p><strong>Compensation</strong></p> <p>The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.</p> <ul> <li>Early Career - $120,000 - $250,000 + equity</li> <li>Mid Career - $175,000 - $362,500 + equity</li> <li>Senior Career - $250,000 - $475,000 + equity</li> </ul> <p><strong>What We Offer</strong></p> <ul> <li><strong>A Stake in our success </strong>A flexible cash equity compensation mix that fits your needs</li> <li><strong>Heath & Wellness </strong>Company subsidized Health, Dental, Vision, and Life insurance; Pre-tax Health Savings Accounts with generous company contribution (even if you don’t)</li> <li><strong>Time To Recharge </strong>4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year</li> <li><strong>Support to Parents</strong> Up to 12 weeks of paid parental leave, regardless of your path to parenthood</li> <li><strong>Learning & Development </strong>$1,500 yearly towards your professional development e.g. conferences, courses, and other learning opportunities</li> <li><strong>Team Connection</strong> Team Lunches, quarterly off-sites, and regular town halls</li> <li><strong>Financial Wellbeing </strong>401K and/or Roth IRA, with 5% company contribution, even if you don’t!</li> <li><strong>Flexible Spending Accounts</strong> Pre-tax spend accounts for medical, dental/vision