Senior Silicon Substrate & Packaging Manufacturing Engineer @ Fractile

About the company

Fractile is a UK AI hardware startup building next-generation inference chips and systems for frontier AI.

About this role

<p>Fractile is building silicon, systems and software which will redefine the frontier of AI: running the world’s most advanced models at radically higher speed and lower cost. We have an exceptional team across hardware and software capable of bringing about this change, and we are growing fast to meet demand and deliver our product at scale.</p> <p>At this level of compute density and bandwidth, manufacturing precision is a competitive weapon. Yield, ramp velocity, and supplier performance are not operational details — they determine whether we win.</p> <p>We are hiring a&nbsp;Senior Silicon Substrate &amp; Packaging Manufacturing Engineer&nbsp;to own packaging manufacturing execution in Taiwan and drive our products from first silicon through high-volume production.</p> <p>This is a high-accountability role with direct impact on the company's trajectory.</p> <p><strong>The Role</strong></p> <p>You will be Fractile’s senior manufacturing authority in Taiwan for substrate and package assembly.</p> <p>You will:</p> <ul> <li>Own packaging yield and ramp performance.</li> <li>Lead manufacturing strategy with OSATs and substrate suppliers.</li> <li>Drive structured problem-solving under schedule pressure.</li> <li>Build scalable manufacturing discipline in a startup environment.</li> </ul> <p>You are not coordinating — you are deciding, driving, and delivering.</p> <p><strong>What You’ll Own</strong></p> <p><strong>Manufacturing Strategy &amp; NPI Leadership</strong></p> <ul> <li>Define packaging manufacturing readiness criteria from EVT through HVM.</li> <li>Lead NPI builds (EVT/DVT/PVT) with clear yield and quality targets.</li> <li>Identify scaling risks early (process capability, warpage, cycle time, substrate constraints).</li> <li>Influence package decisions based on manufacturability and ramp risk.</li> </ul> <p><strong>Yield &amp; Excursion Leadership</strong></p> <ul> <li>Own assembly yield targets and improvement roadmaps.</li> <li>Lead deep root-cause analysis across OSAT and substrate partners.</li> <li>Drive implementation and validation of permanent corrective actions.</li> <li>Establish data-driven monitoring (SPC, Cpk, excursion response frameworks).</li> </ul> <p><strong>Supplier Performance Management</strong></p> <ul> <li>Act as the senior technical escalation point for OSAT and substrate vendors.</li> <li>Set performance expectations and hold partners accountable.</li> <li>Drive continuous improvement in:</li> <ul> <li>Yield</li> <li>Cycle time</li> <li>Process capability</li> <li>Cost structure</li> </ul> <li>Build strong working relationships while maintaining high standards.</li> </ul> <p><strong>Reliability &amp; Production Robustness</strong></p> <ul> <li>Own qualification execution and reliability closure.</li> <li>Ensure packaging robustness under high current density and AI workloads.</li> <li>Drive failure analysis across material, assembly, and process domains.</li> <li>Prevent repeat escapes by strengthening process controls.</li> </ul> <p><strong>Ramp to High Volume</strong></p> <ul> <li>Define ramp plans and yield maturation curves.</li> <li>Track ramp health and escalate risk to leadership early.</li> <li>Partner with supply chain to mitigate substrate and capacity risks.</li> <li>Lead post-ramp cost-down and yield stabilization initiatives.</li> </ul> <p><strong>What We’re Looking For</strong></p> <ul> <li>8+ years in semiconductor packaging manufacturing or product engineering.</li> <li>Proven experience ramping complex FC-BGA or advanced packages to volume.</li> <li>Deep understanding of:</li> <ul> <li>Flip-chip assembly flows</li> <li>Large body substrate warpage control</li> <li>Underfill and reliability interactions</li> <li>Assembly defect pareto analysis</li> <li>SPC and process capability metrics</li> </ul> <li>Strong track record working directly with Taiwan OSATs and substrate vendors.</li> <li>Demonstrated ownership of yield improvement programs.</li> </ul> <p><strong>Strong Plus</strong></p> <ul> <li>Experience with large AI / HPC ASICs.</li> <li>Exposure to 2.5D or high-bandwidth memory packaging.</li> <li>Experience ramping first-generation silicon in a startup or fast-scaling environment.</li> <li>Fluent Mandarin and English.</li> </ul> <p><strong>What Senior Means at Fractile</strong></p> <p>At Fractile, “Senior” means:</p> <ul> <li>You operate independently.</li> <li>You escalate before problems become crises.</li> <li>You make principled tradeoffs between performance, yield, cost, and schedule.</li> <li>You can walk into a supplier factory, diagnose issues, and drive alignment.</li> <li>You think beyond the build in front of you and design systems that scale.</li> </ul> <p><strong>Why This Role Is Critical</strong></p> <p>Packaging yield and ramp speed directly impact revenue, customer commitments, and strategic momentum.</p> <p>This role ensures:</p> <ul> <li>First silicon does not stall.</li> <li>Ramp is predictable.</li> <li>Suppliers perform at our standard.</li> <li>Manufacturing becomes a competitive advantage.</li> </ul> <p>If you perform well in this role, you will shape how Fractile scales its hardware globally.</p> <p><strong>About us</strong></p> <ul> <li>Founded in 2022, team of 70+, which is expanding rapidly</li> <li>Modern, open offices in London and Bristol</li> <li>Collaborative, problem-solving culture built on deep curiosity, entrepreneurial initiative and technical fluency</li> </ul> <p><strong>Export control and security clearance</strong></p> <p>Certain roles may involve working on technologies subject to export restrictions. Applicants may be required to undergo additional eligibility checks to ensure compliance with applicable law.</p>