Graphcore is an AI infrastructure and hardware company.
<p>Senior Post Silicon Validation Engineer (Bringup)</p> <p>Salary $156,500 - $211,700 + Phantom Equity + Benefits </p> <p><span data-contrast="none">Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. </span><span data-ccp-props="{"134233117":false,"134233118":false,"335557856":16777215,"335559738":0,"335559739":0}"> </span></p> <p><span data-contrast="none">As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin which will play a central role in Graphcore's work building the future of AI computing. </span><span data-ccp-props="{"134233117":false,"134233118":false,"335557856":16777215,"335559738":0,"335559739":0}"> </span></p> <p><span data-contrast="none">We are looking to hire Post-Silicon Validation Engineers to join our collaborative, cross-functional development team validating cutting edge, high performance AI chips and platforms. You will play a critical role in supporting new product introductions and post-silicon validation.</span><span data-ccp-props="{}"> </span><span data-contrast="none">Working within the Post-Silicon Validation team, you will be involved with bringing first silicon to life, functionally validating it and working closely with many other teams to help it become a fully characterised and working product, reporting project status/progress to program management on a regular basis. You will have the opportunity to, and be responsible for, leading, mentoring, and providing technical guidance to other engineering team members. In this role, you can leverage your experience and industry knowledge to architect and drive implementation of continuous improvements to test infrastructure and processes.</span><span data-ccp-props="{}"> </span></p> <p><span data-contrast="none">The Post-Silicon Validation team sits within the Architecture and Validation team, we are responsible for validation of new silicon when it returns from manufacture, enabling and supporting the production SW and FW teams to bring up their software and also supporting the Silicon Characterisation team. </span><span data-ccp-props="{}"> </span></p> <p><strong><span data-contrast="none">Responsibilities and Duties</span></strong><span data-ccp-props="{}"> </span></p> <ul> <li><span data-contrast="none">Plan, design, develop and debug silicon validation tests in bare metal C/C++ on FPGA/Emulator prior to first silicon</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Deploy silicon validation tests on first silicon and debugging them</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Develop automated test framework and regression test suites in Python to optimize validation efficiency</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Collaborate closely with engineers from many other disciplines on a variety of topics</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Work with Validation and Production Test engineering peers to implement best practices and continuous improvements to test methodologies</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Analyse test results, identify and debug failures/defects</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Contribute to shared test and validation infrastructure</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Provide feedback to architects</span><span data-ccp-props="{}"> </span></li> </ul> <p><strong><span data-contrast="none">Essential skills:</span><span data-ccp-props="{}"> </span></strong></p> <ul> <li><span data-contrast="none">Strong experience in Bare metal / embedded C/C++</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Good knowledge of digital ASICs</span></li> <li><span data-contrast="none">Be highly motivated, a self starter, and a team player </span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Ability to work across teams and programming languages to find root causes of deep and complex issues</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Experience of the post-silicon validation process applied in digital ASIC environments</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Python, Linux</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Excellent communication skills and the ability to collaborate with others to solve problems</span></li> <li><span data-contrast="none">Excellent problem-solving, analytical & diagnostic skills</span><span data-ccp-props="{}"> </span></li> </ul> <p><span data-contrast="none"> </span> <strong><span data-contrast="none">Desirable skills:</span></strong><span data-ccp-props="{}"> </span></p> <ul> <li><span data-contrast="none">Driver level experience with one or more of the following is highly desirable:</span><span data-ccp-props="{}"> </span> <ul> <li><span data-contrast="none">PCIe</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Ethernet</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Memory technologies (LPDDR, DDR, HBM, …)</span><span data-ccp-props="{}"> </span></li> <li><span data-contrast="none">Other peripherals such as I2C, I3C, SPI, …</span><span data-ccp-props="{}"> </span></li> </ul> </li> <li><span data-contrast="none">Good knowledge of mixed-signal building blocks such