Graphcore is an AI infrastructure and hardware company.
<p><span data-contrast="none">Silicon Physical Design Engineer</span></p> <p><span data-contrast="none"><strong>Multiple roles across different levels</strong></span></p> <p><span data-contrast="none">Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. </span></p> <p><span data-contrast="none">As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. </span><span data-ccp-props="{"134233117":false,"134233118":false,"335557856":16777215,"335559738":0,"335559739":0}"> </span></p> <p><span data-contrast="auto">The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC).</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></p> <p><span data-contrast="auto">We are looking to hire high-quality silicon physical design engineers to join our team. The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge </span> <span data-contrast="auto">designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to ta</span><span data-contrast="auto">ke ownership of their designs and problem solutions. You will be part of a team that looks for </span><span data-contrast="auto">improvements to everything we do: our designs, our flows, our methodologies, our infrastructure.</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></p> <p><strong><span data-contrast="auto">Responsibilities and Duties</span></strong><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></p> <ul> <li><span data-contrast="auto">Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, focusing on achieving robust, high-performance and power-efficient designs in leading-edge process technologies while meeting ambitious development schedules</span></li> <li><span data-contrast="auto">Contributions are expected to span multiple areas and involve:</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span> <ul> <li><span data-contrast="auto">using state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs that are of sign-off quality</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></li> <li><span data-contrast="auto">enhancing existing flows and in-house tools/APIs to support new features and/or methodologies</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></li> <li><span data-contrast="auto">analysis and/or debugging of complex engineering problems leading to workable solutions</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></li> <li><span data-contrast="auto">developing an understanding of emerging technical issues and applying that knowledge to optimise in-house flows and methodologies</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></li> </ul> </li> <li><span data-contrast="auto">Candidates will be expected to work closely both with other teams within Graphcore and with 3rd party support engineers/contractors, ensuring good communication between all parties, and to contribute meaningfully to the overall efficiency and success of the Physical Team</span></li> </ul> <p><strong><span data-contrast="auto">Essential skills:</span></strong><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></p> <ul> <li><span data-contrast="auto"> A Degree in Electronic/Electrical Engineering, Computer Science or related subject with 3+ years of Industry experience </span></li> <li><span data-contrast="auto"> Be highly motivated, a self-starter, and a team player</span></li> <li><span data-contrast="auto"> Excellent problem-solving skills for debugging issues seen and finding root causes</span></li> <li><span data-contrast="auto"> Ability to program/script (required to solve design issues, typically in Tcl and Python)</span></li> <li><span data-contrast="auto"> Experience in 7nm or smaller technologies</span></li> <li><span data-contrast="auto"> A good breadth of experience with physical design flows including: </span> <ul> <li><span data-contrast="auto">Floorplanning/Budgeting</span></li> <li><span data-contrast="auto">Synthesis</span></li> <li><span data-contrast="auto">Place and Route</span></li> <li><span data-contrast="auto">Clock CTS</span></li> <li><span data-contrast="auto">Logical Equivalence</span></li> <li><span data-contrast="auto"><span class="TextRun SCXW251361434 BCX0" lang="EN-GB" data-contrast="auto"><span class="NormalTextRun SCXW251361434 BCX0">Timing Analysis</span></span></span></li> <li><span data-contrast="auto">Physical Verification (DRC/LVS/ERC)</span><span data-ccp-props="{"335551550":0,"335551620":0}"> </span></li> </ul> </li> </ul> <p><span data-ccp-props="{"335551550":0,"335551620":0}"> </span><strong><span data-contrast="auto">Desirable skills:</span></strong><span data-ccp-props="