Fractile is a UK AI hardware startup building next-generation inference chips and systems for frontier AI.
<div class="p-rich_text_section"> <div class="layout-content"> <div class="notion-selectable notion-page-block" data-block-id="14b2905b-d614-8006-a80f-dc58ff451e32"> <p><span style="font-size: 12pt;"><strong>London or Bristol, 3 days in the office, 2 days WFH</strong></span></p> <p><span style="font-size: 12pt;">At Fractile, we’re building what we believe will be the world’s fastest AI inference chip from the ground up. We’re balanced across hardware and software engineering, and HW/SW co-design is real here. We move fast, and we help each other move fast. We care about each other, the software we ship, and the people who rely on it.</span></p> <p><span style="font-size: 12pt;">On the device, close to the metal, we write the runtime software that orchestrates work across the chip and runs performance-critical ML kernels. This is where performance gets real and the wins compound. Your work directly influences trade-offs for the silicon, system deployment, and the compiler.</span></p> <p><span style="font-size: 12pt;">You'll drive the first accelerator compute runs, evaluating performance on silicon, running early benchmarks, and feeding results back into the hardware and software roadmap.</span></p> <h3><span style="font-size: 12pt;"><strong>What you’ll do</strong></span></h3> <ul> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Write and optimise performance-critical ML kernels in C, with assembly where it matters (RISC-V and our own ISA)</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Build the low-level control paths that feed those kernels, including scheduling, synchronisation, and data movement</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Write targeted validation workloads and microbenchmarks to keep simulation and hardware behaviour aligned and performance measurable.</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Profile, benchmark, and track regressions so performance improvements are real and repeatable</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Work closely with simulation, hardware, ML, compiler, firmware, and runtime engineers in a tight loop, turning profiling data into architecture feedback and real performance wins.</span></li> </ul> <h3><span style="font-size: 12pt;"><strong>What we’re looking for</strong></span></h3> <ul> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Proven deeply embedded software experience</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Strong performance instincts. You can reason about low-level architecture, memory behaviour, and where the cycles are spent</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Excellent C, and a pragmatic approach to building high-quality, maintainable low-level code</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Comfortable writing and debugging optimised assembly (RISC-V ideal)</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Collaborative and high-ownership. You communicate clearly, move fast, and enjoy working through hard problems with others</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Computer Science, Electronic Engineering, Maths, Physics, or related degree and 3+ years of industry experience</span></li> </ul> <h3><span style="font-size: 12pt;"><strong>Nice to have</strong></span></h3> <ul> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Experience with GPUs or dedicated ML accelerators</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Rust and/or Python experience</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Experience with simulators (functional or performance) and writing validation or benchmarking workloads</span></li> <li style="font-size: 12pt;"><span style="font-size: 12pt;">Familiarity with modern ML inference workloads</span></li> </ul> <p><span style="font-size: 12pt;">If you want to build the software that turns cutting-edge hardware capability into real throughput and low latency, come build it with us.</span></p> </div> </div> </div>