Ethernovia develops high-performance Ethernet-based packet processors that serve as the data backbone for autonomous vehicles, robots and other edge AI machines.
<div class="content-intro"><p><strong>About Ethernovia, Inc.</strong></p> <p>Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018, the company’s breakthrough data transport and acceleration technology is ushering in a new era of connectivity and capabilities in the vehicle and at the edge, including highly reliable autonomy, over-the-air servicing and AI-backed applications.<span class="Apple-converted-space"> </span></p> <p>Ethernovia's co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds’ leading technology investors, having secured <strong>$154M</strong> ($90+M Series-B and $64M Series-A) in <strong>total funding</strong> to date:</p> <ul> <li><a href="https://www.businesswire.com/news/home/20260120549197/en/Ethernovia-Raises-Over-%2490-Million-Series-B-to-Scale-Leading-Edge-Autonomy-and-Physical-AI-Networking-Chips">Ethernovia Raises Over $90 Million Series B to Scale Leading-Edge Autonomy and Physical AI Networking Chips</a></li> <li><a href="https://www.businesswire.com/news/home/20230515005222/en/Ethernovia-Raises-64-Million-to-Accelerate-the-Revolution-of-Vehicle-Networks/">Ethernovia Raises $64 Million to Accelerate the Revolution of Vehicle Networks | Business Wire</a> <ul> <li>(financial backers include: Porsche SE, Qualcomm, AMD, Western Digital, Maverick Silicon,<span class="Apple-converted-space"> Socratic Partners,</span> Conduit Capital, and CDIB-TEN Capital)</li> </ul> </li> </ul> <p><span data-teams="true">Ethernovia has been recognized in EE Times' prestigious list of the Top 100 Startups for 2025.</span></p> <ul> <li>March 2026: <a href="https://www.businesswire.com/news/home/20260316729719/en/Ethernovia-Announces-HSB-Enabled-Networking-Board-for-NVIDIA-Holoscan-Platforms">Ethernovia Announces HSB-Enabled Networking Board for NVIDIA Holoscan Platforms</a></li> <li>January 2024: Our <a href="https://www.ethernovia.com/blog/ramin-named-motortrend-awards-winner/">CEO Ramin Shirani Named MotorTrend Software-Defined Vehicle Innovator Awards Winner (ethernovia.com)</a> </li> <li>September 2023: <a href="https://www.ethernovia.com/blog/continental-and-ethernovia-announce-partnership/">Continental and Ethernovia Announce Partnership to Develop Automotive Switch in 7nm - Ethernovia</a></li> <li><strong><a href="https://www.autoconnectedcar.com/2023/09/connected-car-news-helios-continental-ethernovia-avanci-bmw-mapbox-porsche-sema-honda-ultrasense-flex-logix-diodes-inc-garmin-toyota-caruso/#Continental_Ethernovia_for_SDVs">Connected Car News: Helios, Continental, Ethernovia, Avanci, BMW, Mapbox, Porsche, SEMA, Honda, UltraSense, Flex Logix, Diodes Inc., Garmin, Toyota & Caruso | auto connected car news</a></strong></li> </ul> <p>With talented employees on 4 continents, we have filed 50+ patents to date.</p> <p>Join Ethernovia’s team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles, robots and intelligent machines. Come share in our success with pre-IPO shares, competitive compensation, and great benefits while growing your knowledge and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive cutting edge designs from concept to silicon to the future of mobility.</p></div><p><strong>Senior ASIC Front-End Design Engineer</strong></p> <p><strong>Summary:</strong></p> <ul> <li>As a Senior ASIC Front-End Design Engineer, you will be <strong>responsible for all aspects of digital SoC design</strong>, from micro-architecture specification, RTL, verification, synthesis, lint, CDC, LEC, and static timing analysis to deliver a design meeting target power, performance, and area goals.</li> <li>Work with system architects, software, hardware, and verification engineers to plan, architect, design, implement, and deliver <strong>advanced automotive communication semiconductors and systems</strong>.</li> <li>You will be on the leading edge of the <strong>development and definition of advanced, high-performance custom silicon</strong> that embodies functions from a wide range of protocols, algorithms, and applications.</li> <li>Expected to flesh out product definitions with precise specifications of: an <strong>ASIC's internal and external interactions, data flow, processing algorithms</strong> across a number of disciplines, resource management, and software interfaces.</li> <li>You will be a trusted self-starter who can work with very little guidance or oversight.</li> <li>This position is located in: <strong>United States - Remote</strong></li> </ul> <p><strong>Key Qualifications:</strong></p> <ul> <li>BS and/or MS in Electrical Engineering, Computer Science, or related field</li> <li><strong>Minimum 10+ years of ASIC RTL design</strong> and/or architecture experience</li> <li>Proven track record with the <strong>development of complex SoCs</strong></li> <li>Strong understanding of <strong>digital design fundamentals</strong> and <strong>methodologies</strong></li> <li>In-depth knowledge of <strong>Verilog/System Verilog</strong> and simulation tools.</li> <li>Self-motivated and able to work effectively both independently and in a team</li> </ul> <p><strong>Additional Success Factors:</strong></p> <p>Experience in any of the following areas:</p> <ul> <li><strong>Networking</strong> (Ethernet MAC, PHY, Switching, TCP/IP, security, PCIe and other industry standard protocols)</li> <li>Video standards, protocols, processing</li> <li>Digital signal processing filters</li> <li>IP integration (SerDes, controllers, processors, etc.)</li> <li>Perl, TCL, C/C++, Make</li> </ul> <p><strong>Personal