Chaos Industries is a Los Angeles–based manufacturer of radar systems designed to detect drones.
<p><span data-contrast="auto">CHAOS Industries is redefining modern defense with omniscient systems purpose-built for today’s realities. Designed and built by top U.S. military veterans and Silicon Valley innovators, CHAOS Industries’ products are powered by Coherent Distributed Networks (CDN™), empowering warfighters, commercial air operators, and border protection teams to act faster, adapt rapidly, and stay ahead of evolving threats. In a world where technological threats move at unprecedented speed, CHAOS Industries delivers advanced sensing and detection solutions that give the ultimate advantage: time. </span><span data-ccp-props="{"201341983":0,"335559685":360,"335559739":0,"335559740":240}"> </span></p> <p><span data-contrast="auto">CHAOS Industries was founded in 2022 and has raised $1B in total funding from leading investors including 8VC, Accel, and NEA. The company is headquartered in Los Angeles, with offices in Washington, D.C., San Francisco, Seattle, and London. For more information, please visit <a href="https://www.chaosinc.com">www.chaosinc.com</a>.</span><span data-ccp-props="{"201341983":0,"335559685":360,"335559739":0,"335559740":240}"> </span></p> <p> </p> <p><strong>Role Overview:</strong></p> <p>CHAOS is seeking a highly-skilled and motivated FPGA Engineer to join our team supporting our R&D and product engineering initially focusing on our next-generation radar products. This is a highly collaborative role which will allow you to work on multiple capabilities within our product offerings. As a member of our engineering team, you also have the opportunity to expand your skillset across our product families. </p> <p><strong>Responsibilities: </strong></p> <ul> <li>Design and implement complex FPGA designs targeting our next-generation sensor products</li> <li>Support system integration of FPGA designs with complex software systems</li> <li>Support deployed FPGA capabilities in the hands of our U.S. and international customers</li> <li>Work full-time on-site in our office in El Segundo, California</li> </ul> <p><strong>Minimum Requirements:</strong></p> <ul> <li>Bachelor’s or higher degree in Computer Engineering, Electrical Engineering, Computer Science or related degree</li> <li>5+ years of experience in a professional setting performing detailed digital RTL design targeting FPGAs</li> <li>Extensive experience with the entire FPGA design life cycle: RTL design, behavioral simulation, place and route, timing analysis, hardware integration</li> <li>Extensive experience developing in Verilog and SystemVerilog</li> <li>Extensive experience with the ARM AMBA AXI Protocol (AXI4, AXI4-Lite, AXI4-Stream)</li> <li>Extensive experience with the AMD (Xilinx) Vivado Design Suite and SoC FPGAs (Zynq, Ultrascale/Ultrascale+, Versal)</li> <li>Experience with Network Protocols (TCP/UDP/IP)</li> <li>Experience with Serial Protocols (I2C, JTAG, UART, SPI, CAN)</li> <li>Experience using Bash and Python for scripting and testing</li> <li>Experience modifying software drivers and applications when needed to validate FPGA designs</li> <li>Experience with Agile lifecycle processes including Scrum, Continuous Integration, and Test-Driven Development Methodologies</li> <li>Ability to work with minimal supervision and collaborate on small teams</li> <li>U.S. Person status is required as this position will require the ability to access U.S.-only data systems </li> </ul> <p><strong>Preferred Requirements:</strong></p> <ul> <li>Experience designing and implementing highly performant baseband signal processing in an FPGA</li> <li>Experience translating high level algorithms from Simulink/MATLAB or similar into RTL including FPGA Vendor IP implementations</li> <li>Experience developing and implementing software drivers (C/C++/Python) to interface with FPGA designs</li> <li>Experience with FPGA Ethernet IP blocks (1G/10G/40G/100G)</li> <li>Experience with Software-Defined Radios (SDRs) (e.g. Ettus, NI, HackRF)</li> <li>Experience with Analog Device Transceivers</li> <li>Experience in Ground or Airborne Sensors (Radars, EO/IR, EW, etc.)</li> <li>Experience with Time Synchronization technologies (NTP / PTP)</li> <li>Experience with HLS Synthesis and languages (C/C++/SystemC/Chisel)</li> <li>Experience with VHDL</li> <li>Experience with high-speed, multi-layer, digital printed circuit board (PCB) design</li> <li>Current or previous DoD security clearance </li> <li>Experience with GPUs and/or AI engines</li> <li>Experience with git</li> <li>Experience with Bitbucket CI, Jenkins or similar CI/CD flows</li> <li>Experience with DoD & related System/SW Architectures and messaging standards (e.g. OMS, SOSA, Link-16, etc) </li> </ul> <p><strong>Why CHAOS?</strong></p> <ul> <li><strong>Health Benefits: </strong>Medical, dental, and vision benefits 100% paid for by the company</li> <li><strong>Additional benefits</strong>: 401k (+ 50% company match up to 6% of pay), FSA, HSA, life insurance, and more</li> <li><strong>Our Perks: </strong>Free daily lunch, ‘No meeting Fridays’, unlimited PTO, casual dress code</li> <li><strong>Compensation Components:</strong> Competitive base salaries, generous pre-IPO stock option grants, relocation assistance, and (coming soon!) annual bonuses</li> <li><strong>Team Growth: </strong>200 employees and counting across 5 global offices</li> </ul> <div><em><strong>Salary range: $160,000 - 225,000</strong></em></div> <p><em>The stated compensation range reflects only the targeted base compensation range and excludes additional earnings such as bonus, equity, and benefits. If your compensation requirements fall outside of the range, we still encourage you to apply. The salary range for this role is an estimate based on a range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, c