Graphcore is an AI infrastructure and hardware company.
<h1><strong>About us</strong></h1> <p>At Graphcore, we’re building the future of AI compute.</p> <p>We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale.</p> <p>As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem.</p> <p>To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world.</p> <p>We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence.</p> <p> </p> <h1><strong>Job Summary</strong></h1> <p>Reporting to Senior Director of Post Silicon Validation, the Debug Validation Engineer will drive post-silicon debug and validation activities for next-generation AI compute silicon and systems. You will lead teams passionate about identifying, reproducing, analyzing, and resolving complex silicon, firmware, and system-level issues during bring-up, characterization, and product readiness. This role combines deep technical debugging expertise with strong cross-functional collaboration across multiple engineering fields.</p> <p> </p> <h1><strong>The Team</strong></h1> <p>The Post-Silicon Debug and Validation team manages bring-up, fault diagnosis, and validation of Graphcore silicon and systems. Our team participates throughout the entire product lifecycle, supporting initial silicon bring-up, subsystem validation, system integration, and production readiness tasks. We coordinate closely with hardware, firmware, software, and systems teams to examine complex failures, develop debug strategies, and advance validation infrastructure.</p> <p> </p> <h1><strong>Responsibilities and Duties</strong></h1> <ul> <li>Lead post-silicon debugging and validation efforts for AI compute silicon and platform technologies</li> <li>Contribute to debug and validation activities across multiple projects and achievements</li> <li>Analyze and address intricate silicon, firmware, software, and system-level problems during bring-up and validation</li> <li>Develop structured debug methodologies and failure analysis processes to improve issue resolution efficiency</li> <li>Work in close partnership with architecture, RTL, firmware, software, and systems engineering groups to determine root causes and carry out corrective measures</li> <li>Drive debug of CPU, memory, interconnect, and high-speed I/O subsystems under functional, stress, and workload conditions</li> <li>Develop and improve automated debug, regression, and validation infrastructure using Python and related technologies</li> <li>Analyze logs, traces, telemetry, and hardware data to isolate and characterize system failures and performance issues</li> <li>Support development of validation tests, debug tooling, and custom diagnostics to improve coverage and observability</li> <li>Define validation metrics, debug workflows, and reporting standards to ensure consistent and repeatable analysis</li> <li>Communicate technical risks, status, and recommendations clearly to engineering leadership and cross-functional collaborators</li> <li>Support silicon readiness reviews and contribute to product quality and release decisions</li> <li>Contribute to continuous improvement of debug methodologies, validation infrastructure, and engineering workflows</li> </ul> <p> </p> <h1><strong>Candidate Profile</strong></h1> <h2><strong>Essential:</strong></h2> <ul> <li>Strong experience in bare metal environments</li> <li>Strong understanding of SoC and platform architectures</li> <li>Expertise in debug infrastructure and post-silicon debug methodologies</li> <li>Strong programming skills in Python, C, or debug scripting languages such as CMM or equivalent experience</li> <li>Highly motivated self-starter with a collaborative and team-oriented approach</li> <li>Ability to collaborate across teams and programming languages to uncover root causes of deep and complex issues</li> <li>Experience of the post-silicon validation process applied in digital ASIC environments</li> <li>Strong Linux and Python experience</li> <li>Outstanding communication skills and the ability to collaborate effectively to solve complex problems</li> <li>Excellent problem-solving, analytical, and diagnostic skills</li> <li>Deep knowledge of scan, DFT, JTAG, and trace infrastructure</li> <li>Strong debug skills including fault tree analysis, failure isolation, fishbone methodologies, and system-level debug techniques</li> <li>Capability to operate autonomously on technically intricate debug and validation tasks spanning hardware, firmware, and software areas</li> </ul> <h2><strong>Desirable</strong></h2> <ul> <li>Understanding of DFT flows from insertion through post-silicon validation</li> <li>Experience developing tooling for parsing and analyzing debug data, including scan dump parsing</li> <li>Driver-level experience with one or more of the following technologies: PCIe, Ethernet, Memory technologies including LPDDR, DDR, and HBM, Peripheral interfaces such as I2C, I3C, and SPI</li> <li>Experience using CoreSight and similar debug infrastructure including CTI, ETx, DStream, JLink, Lauterbach, ATB, and STM or equivalent experience</li> <li>Strong understanding of mixed-signal components like PLLs, high-speed PHYs, and IC control/communication protocols</li> <li>Experience with Arm CPU architectures, system IP, and associated debug tooling</li> <li>Experience with AMBA protocols</li> <li>Understanding of ML applications and associated workloads</li> <li>Experience in characterization, failure analysis, test development, statistical analysis, and customer support<br><br></li> </ul> <h1><strong>Benefits</strong></h1> <p>In addition to a competitive salary, Graphcore offers flexibl