Lemurian Labs provides a hardware-agnostic platform that streamlines AI development across edge, cloud and on-premise environments.
<div class="content-intro"><h2><strong>About Us</strong></h2> <p>At Lemurian Labs, we're reimagining the foundations of computing to make AI accessible to everyone. Our mission is to remove the limits of scale, hardware, and cost that hold back innovation, so the people solving humanity's hardest problems can move faster.</p> <p>We're building a new kind of software stack: a hardware-agnostic platform that makes every system — from a laptop to a supercomputer — feel like one seamless engine. Developers can write once, run anywhere, and get state-of-the-art performance across any chip, any cloud, at any scale. It's a complete rethink of how software and hardware interact — designed for the era beyond Moore's Law.</p> <p>We're not looking for the comfortable or the conventional; we're looking for the bold. The engineers who crave frontier problems, who want to bend the limits of what's possible, who see infrastructure not as a constraint but as a canvas. If you want to build the foundation for the next era of AI and change what humanity can achieve in the process, join us.</p></div><div> <h2><span style="text-decoration: underline;"><strong>About the Role</strong></span></h2> <p>We're looking for a Graph Optimization Compiler Engineer to own the middle tier of our AI compiler stack — the layer where high-level model graphs are transformed, simplified, and made ready for efficient code generation. You'll design and implement the optimization passes that make the difference between a model that runs and a model that flies.</p> <p>This role sits between our compiler front end and code generation backend. You'll work on graph-level transformations — fusion, layout optimization, dead code elimination, constant folding, and more — with a direct line of sight to the performance outcomes your work produces. If you think in data flow graphs and optimization passes, and you want that thinking to power the next generation of AI infrastructure, we'd love to talk.</p> <h2><span style="text-decoration: underline;"><strong>What You'll Do</strong></span></h2> <ul> <li>Design, develop, and maintain the graph optimization layer of our heterogeneous AI compiler</li> <li>Implement and extend graph-level transformation passes including operator fusion, layout propagation, dead code elimination, constant folding, and algebraic simplification</li> <li>Define and evolve our intermediate representation (IR) to support new optimization opportunities as ML model architectures advance</li> <li>Analyze performance data to identify optimization gaps and drive measurable improvements in throughput and latency</li> <li>Collaborate with front end and code generation teams to ensure clean IR interfaces and well-structured optimization pipelines</li> <li>Propose and prototype new optimization strategies in response to advances in model design and hardware capabilities</li> <li>Contribute to testing and validation infrastructure to ensure optimization correctness across model types and hardware targets</li> </ul> <h2><span style="text-decoration: underline;"><strong>Requirements</strong></span></h2> <h3><strong>Essential Skills and Experience</strong></h3> <ul> <li>BS degree in Computer Science, Computer Engineering, or equivalent practical experience</li> <li>4+ years of experience working with compilers, with a focus on intermediate representation design or optimization passes</li> <li>Deep knowledge of graph-level compiler optimization techniques — fusion, tiling, layout transformations, and related methods</li> <li>4+ years of experience with C/C++</li> <li>Strong written and verbal communication skills; ability to write clear and concise technical documentation</li> </ul> <h3><strong>Preferred Skills and Experience</strong></h3> <ul> <li>Master's or PhD in Computer Science, Computer Engineering, or equivalent</li> <li>Experience with polyhedral models or affine analysis for loop and tensor optimization</li> <li>Familiarity with hardware memory hierarchies and how layout decisions impact performance on GPUs or accelerators</li> <li>Experience working with MLIR, XLA, or similar graph-level IR frameworks</li> <li>Experience with ML framework internals — PyTorch eager/compile mode, JAX/XLA, or TensorRT</li> <li>Strong understanding of ML model architectures and their computational patterns (attention, convolution, normalization, etc.)</li> <li>Knowledge of quantization, sparsity, or other model-level optimization techniques</li> <li>Contributions to open-source compiler or ML infrastructure projects</li> </ul> <h2><span style="text-decoration: underline;"><strong>Why Join Lemurian Labs</strong></span></h2> <ul> <li>Own a critical layer of our compiler stack where optimization decisions have direct, measurable impact on model performance</li> <li>Work on the hardest graph-level problems in AI infrastructure — across diverse hardware targets and model architectures</li> <li>Collaborate with a team that treats infrastructure as a canvas and optimization as a craft</li> <li>Competitive compensation including equity, medical/dental/vision, retirement savings, and wellness benefits</li> </ul> <p><br><br></p> </div><div class="content-conclusion"><p>Lemurian Labs is an equal opportunity employer. We celebrate diversity and are committed to creating an inclusive environment for all employees, regardless of gender identity, race, ethnicity, sexual orientation, disability status, age, or background.</p> <p>Compensation depends on experience and geographic location and will be narrowed during the interview process. Additional benefits include equity, company bonus opportunities, medical, dental, and vision coverage, a retirement savings plan, and supplemental wellness benefits.</p></div>