Principal System/Rack Mechanical Engineer
at Astera Labs
- Seniority
- Staff Principal
- Location
- Research Triangle Park, North Carolina, United States
- Posted
- 5d ago
at Astera Labs
<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><h1>Senior Principal Mechanical Engineer</h1> <p><strong>Location:</strong> Research Triangle Park (RTP), North Carolina<br><strong>Department:</strong> Hardware Engineering / System Architecture<br><strong>Employment Type:</strong> Full-Time</p> <p>We are seeking a <strong>Senior Principal Mechanical Engineer</strong> to lead mechanical architecture and system integration across next-generation AI platforms, optical networking systems, and rack-scale infrastructure solutions.</p> <h1>The Opportunity</h1> <p>This is a highly visible leadership role responsible for developing mechanical architecture across:</p> <ul> <li>PCIe Scale-Up AI Infrastructure</li> <li>UALink Rack-Scale Fabrics</li> <li>Ethernet Scale-Out Systems</li> <li>ESUN Network Architectures</li> <li>GPU Compute Platforms</li> <li>Open Rack Systems</li> <li>Fiber Connectivity Infrastructure</li> <li>NPO (Near Package Optics)</li> <li>CPO (Co-Packaged Optics)</li> <li>Air-Cooled and Liquid-Cooled AI Platforms</li> </ul> <p>You will work closely with Thermal, Power, Electrical, Silicon, Software, and System Architecture teams, as well as ODM partners including Accton, Hyve, Wistron, Quanta, and Gigabyte.</p> <h1>What You'll Do</h1> <h2>Lead Mechanical Architecture for AI Platforms</h2> <ul> <li>Define mechanical architecture from device-level products through complete rack-scale AI systems.</li> <li>Develop scalable mechanical designs supporting future generations of AI infrastructure.</li> <li>Establish system-level design requirements balancing: <ul> <li>Performance</li> <li>Reliability</li> <li>Manufacturability</li> <li>Serviceability</li> <li>Cost</li> <li>Sustainability</li> </ul> </li> </ul> <h2>Design Rack-Scale AI Infrastructure</h2> <p>Own mechanical architecture for:</p> <ul> <li>GPU Compute Platforms</li> <li>PCIe Scale-Up Switch Platforms</li> <li>UALink Switch Platforms</li> <li>Optical Connectivity Systems</li> <li>Rack Controllers</li> <li>Rack Enclosures</li> <li>Cable Management Systems</li> <li>Open Rack Platforms</li> </ul> <p>Drive solutions that support high-density AI computing deployments.</p> <h2>Develop Open Rack and Rack-Level Mechanical Solutions</h2> <ul> <li>Define rack layouts and mechanical interfaces.</li> <li>Develop scalable rack architecture standards.</li> <li>Drive mechanical integration of: <ul> <li>Compute systems</li> <li>Switch platforms</li> <li>Power shelves</li> <li>Cooling infrastructure</li> <li>Optical connectivity</li> <li>Management systems</li> </ul> </li> <li>Support future multi-rack AI factory deployments.</li> </ul> <h2>Enable Fiber Connectivity and Optical Systems</h2> <p>Develop mechanical solutions supporting:</p> <ul> <li>Fiber Infrastructure</li> <li>Optical Engines</li> <li>Silicon Photonics</li> <li>NPO Architectures</li> <li>CPO Architectures</li> <li>Rack-to-Rack Optical Connectivity</li> </ul> <p>Address challenges associated with:</p> <ul> <li>Cable routing</li> <li>Bend radius management</li> <li>Serviceability</li> <li>Fiber protection</li> <li>Field replaceability</li> </ul> <h2>Support Air-Cooled and Liquid-Cooled Systems</h2> <p>Partner with Thermal Engineering teams to:</p> <ul> <li>Optimize airflow architecture.</li> <li>Develop liquid cooling mechanical solutions.</li> <li>Support cold plate integration.</li> <li>Define coolant distribution infrastructure.</li> <li>Improve overall system cooling efficiency.</li> </ul> <h2>Drive Mechanical Design for Manufacturability</h2> <ul> <li>Define manufacturing-ready mechanical solutions.</li> <li>Support supplier and ODM engagement.</li> <li>Drive cost optimization efforts.</li> <li>Establish assembly and service procedures.</li> <li>Improve production scalability and operational efficiency.</li> </ul> <h2>Lead System Integration Activities</h2> <p>Work closely with:</p> <ul> <li>Electrical Engineering</li> <li>Thermal Engineering</li> <li>Power Architecture</li> <li>Silicon Development</li> <li>Product Management</li> <li>Manufacturing Teams</li> </ul> <p>to ensure complete system integration and design alignment.</p> <h2>Collaborate with ODM Partners</h2> <p>Work directly with Accton, Hyve, Wistron, Quanta, Gigabyte, and other ODMs to:</p> <ul> <li>Define mechanical requirements.</li> <li>Review platform designs.</li> <li>Resolve integration challenges.</li> <li>Drive Open Rack implementation.</li> <li>Support design validation and manufacturing readiness.</li> </ul> <h1>Required Qualifications</h1> <ul> <li>Bachelor's, Master's, or PhD in Mechanical Engineering or related discipline.</li> <li>15+ years of experience in mechanical design and system integration.</li> <li>Proven experience leading mechanical architecture for: <ul> <li>Servers</li> <li>Networking Platforms</li> <li>Storage Systems</li> <li>AI Infrastructure