MatX designs next-generation AI processors aimed at outperforming Nvidia GPUs for large language model training and inference.
<p><strong>What MatX Is Building</strong></p> <p>MatX's mission is to make the world's best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. We build the full stack—from silicon and rack design through compilers, kernels, and ML models. </p> <p><strong>About the Role</strong></p> <p>MatX is building next-generation AI infrastructure systems for high-performance datacenter workloads. We are looking for a Senior <strong>Platform TPM, Rack-Scale AI Systems</strong> to drive design-phase execution for our rack-scale platform.</p> <p>This role will coordinate cross-functional execution across rack architecture, accelerator board design, power delivery, thermal and liquid cooling, high-speed interconnect, firmware, diagnostics, test vehicles, system validation, and external CM/JDM partner engagement.</p> <p>You will work closely with Systems Engineering, hardware engineering, firmware, validation, supply chain, and external CM/JDM partners. </p> <p><strong>What You'll Do Here</strong></p> <ul> <li>Drive the integrated execution plan for rack and board design from architecture through design release.</li> <li>Own and maintain the design-phase master schedule across rack, board, power, thermal, interconnect, mechanical, firmware, diagnostics, validation, and supply-chain dependencies.</li> <li>Coordinate execution across key platform workstreams, including board electrical/SI/PI readiness, rack power, liquid cooling, cable/optical interconnect, BMC/telemetry, diagnostics, test vehicles, PLM/BOM/ECO readiness, and external CM/JDM design reviews.</li> <li>Partner with Systems Engineering to define design gates, risks, dependencies, decision points, and exit criteria.</li> <li>Track critical path items, schedule risks, owners, closure dates, and escalation paths.</li> <li>Coordinate design-readiness reviews, DFX reviews, and implementation-readiness reviews with internal teams and external CM/JDM partners.</li> <li>Drive readiness for system validation using test vehicles, including power, thermal, connectivity, diagnostics, instrumentation, telemetry, and validation planning.</li> <li>Maintain a live risk register covering design readiness, system validation readiness, power/thermal risks, interconnect risks, long-lead dependencies, and supply-chain risks.</li> <li>Ensure long-lead design dependencies are visible to supply chain, materials, and sourcing teams.</li> <li>Prepare executive-level updates covering milestone health, top risks, decisions needed, critical path, and resource gaps.</li> <li>Ensure validation learnings are captured, tracked, and incorporated into the platform execution plan.</li> </ul> <h2><strong>Who you are </strong></h2> <ul> <li>8+ years of technical program management, hardware engineering program management, systems engineering, or hardware platform development experience.</li> <li>Experience managing complex hardware platforms through architecture, design, validation, and design release.</li> <li>Experience working across electrical, mechanical, thermal, firmware, validation, manufacturing, supply-chain, and external partner teams.</li> <li>Ability to drive schedules, dependency management, issue tracking, risk management, milestone governance, and executive-level communication.</li> <li>Experience coordinating design reviews and driving closure across cross-functional engineering teams.</li> <li>Working familiarity with several of the following areas: board design, power delivery, SI/PI, thermal design, liquid cooling, high-speed interconnect, firmware, diagnostics, rack integration, or system validation.</li> <li>Experience working with ODMs, JDMs, contract manufacturers, or external engineering/manufacturing partners.</li> <li>Strong written and verbal communication skills, including the ability to summarize technical risks, tradeoffs, decisions, and schedule impact.</li> <li>Proficiency with program-management and engineering collaboration tools such as Jira, Confluence, Smartsheet, MS Project, Google Workspace, or equivalent.</li> </ul> <h2><strong>Bonus Points If You Have</strong></h2> <ul> <li>Experience with AI infrastructure, GPU/accelerator systems, datacenter racks, networking systems, storage systems, or high-power server platforms.</li> <li>Experience coordinating programs involving high-speed interconnects, liquid-cooled systems, telemetry, diagnostics, or rack-scale validation.</li> <li>Prior hands-on engineering experience in hardware, firmware, systems, manufacturing, validation, or a related technical field.</li> </ul> <p><strong>Compensation</strong></p> <p>The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation.</p> <ul> <li>Early Career - $120,000 - $275,000 + equity</li> <li>Mid Career - $175,000 - $450,000 + equity</li> <li>Senior Career - $275,000 - $600,000 + equity</li> </ul> <p><strong>What We Offer</strong></p> <ul> <li><strong>A Stake in our success </strong>A cash/equity mix that fits your needs and option to do early exercise</li> <li><strong>Health & Wellness </strong>Company subsidized Health, Dental, Vision, and Life insurance; Pre-tax Health Savings Accounts with generous company contribution (even if you don’t)</li> <li><strong>Time To Recharge </strong>4 weeks paid time off (accrued), 12 company holidays, and 3 weeks remote/flexible work per year</li> <li><strong>Support to Parents</strong> Up to 12 weeks of paid parental leave, regardless of your path to parenthood</li> <li><strong>Learning & Development </strong>$1,500 yearly towards your professional development e.g. conferences, courses, and other learning opportunities</li> <li><strong>Team Connection</strong> Team Lunches, quarterly off-sites, and regular town halls</li> <li><stron