AttoTude is a Menlo Park–based company developing ASIC over Dielectric interconnect technology for high-bandwidth, energy-efficient AI and hyperscale infrastructure connectivity.
<p><span data-contrast="auto"><span class="TextRun Highlight SCXW137499579 BCX8" lang="EN-US" data-contrast="auto"><span class="NormalTextRun SpellingErrorV2Themed SCXW137499579 BCX8">AttoTude</span><span class="NormalTextRun SCXW137499579 BCX8"> is a leader in groundbreaking interconnect technology for AI and hyperscale data center applications. </span><span class="NormalTextRun SCXW137499579 BCX8">Our</span><span class="NormalTextRun SCXW137499579 BCX8"> solution offers significant improvements in speed, power, </span><span class="NormalTextRun ContextualSpellingAndGrammarErrorV2Themed SCXW137499579 BCX8">reliability</span><span class="NormalTextRun SCXW137499579 BCX8"> and cost compared to existing interconnect solutions. In addition, the solution supports high radix, high density architectures that are critical for AI and hyperscale data centers while </span><span class="NormalTextRun SCXW137499579 BCX8">leveraging</span><span class="NormalTextRun SCXW137499579 BCX8"> existing manufacturing processes. The technology does not require any specialized assembly lines, simplifying its ability to scale to high-volume production.</span></span><span class="EOP SCXW137499579 BCX8" data-ccp-props="{}"> </span><br><br>We are seeking a highly experienced THz IC Design Engineer to join our growing team. In this role, you will be the technical lead in the design and development of cutting-edge mixed-signal ICs. You will be involved in the technical aspects of the THz IC design and development, from concept through to production. This is a hands-on technical position that requires in-depth technical expertise, and the ability to work in a team of highly experienced engineers to accomplish the goals.</span><span data-ccp-props="{}"> </span></p> <p><span data-ccp-props="{"335551550":2,"335551620":2}"> </span></p> <p><strong><span data-contrast="none">Key Responsibilities:</span></strong><span data-ccp-props="{}"> </span></p> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="auto">Design and development of THz ICs for cutting edge AI and Cloud Computing systems </span><span data-ccp-props="{"201341983":0,"335559740":256}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="2" data-aria-level="1"><span data-contrast="auto">Ownership of the full design cycle, including architecture definition, block-level design, simulation, verification, layout and evaluation</span><span data-ccp-props="{"201341983":0,"335559740":256}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="3" data-aria-level="1"><span data-contrast="auto">Drive high-speed IC design, >100GHz bandwidth in Si, SiGe and III-V semiconductor technologies</span><span data-ccp-props="{"201341983":0,"335559740":256}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="4" data-aria-level="1"><span data-contrast="auto">Collaborate with cross-functional teams to ensure timely project execution and design tape-outs</span><span data-ccp-props="{"201341983":0,"335559740":256}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="5" data-aria-level="1"><span data-contrast="auto">Stay updated with the latest trends and technologies in wideband high speed IC design and apply them to improve project outcomes</span><span data-ccp-props="{"201341983":0,"335559740":256}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="2" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="6" data-aria-level="1"><span data-contrast="auto">Occasional travel to the Bay Area (<10%) for remote position</span><span data-ccp-props="{"201341983":0,"335559740":256}"> </span></li> </ul> <p><span data-ccp-props="{"335551550":2,"335551620":2}"> </span></p> <p><strong><span data-contrast="none">Qualifications:</span></strong><span data-ccp-props="{}"> </span></p> <ul> <li data-leveltext="" data-font="Symbol" data-listid="3" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"multilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="auto">10+ years of hands-on experience in III-V (GaAs, GaN and InP) IC design in Bipolar and HEMT process technologies.</span><span data-ccp-props="{"201341983":0,"335559740":256}"> </span></li> </ul> <ul> <li data-leveltext="" data-font="Symbol" data-listid="3" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"46